| Review of circuit level leakage minimization techniques in CMOS VLSI circuits R Lorenzo, S Chaudhury IETE Technical review 34 (2), 165-187, 2017 | 51 | 2017 |
| Single bit‐line 11T SRAM cell for low power and improved stability R Lorenzo, R Pailly IET Computers & Digital Techniques 14 (3), 114-121, 2020 | 39 | 2020 |
| LCNT-an approach to minimize leakage power in CMOS integrated circuits R Lorenzo, S Chaudhury Microsystem Technologies 23, 4245-4253, 2017 | 38 | 2017 |
| A novel 9T SRAM architecture for low leakage and high performance R Lorenzo, S Chaudhury Analog Integrated Circuits and Signal Processing 92, 315-325, 2017 | 24 | 2017 |
| Dynamic threshold sleep transistor technique for high speed and low leakage in CMOS circuits R Lorenzo, S Chaudhury Circuits, Systems, and Signal Processing 36, 2654-2671, 2017 | 21 | 2017 |
| A novel SRAM cell design with a body-bias controller circuit for low leakage, high speed and improved stability R Lorenzo, S Chaudhury Wireless Personal Communications 94, 3513-3529, 2017 | 19 | 2017 |
| Half‐selection disturbance free 8T low leakage SRAM cell R Lorenzo, R Paily International Journal of Circuit Theory and Applications 50 (5), 1557-1575, 2022 | 14 | 2022 |
| A review on radiation‐hardened memory cells for space and terrestrial applications M Pavan Kumar, R Lorenzo International journal of circuit theory and applications 51 (1), 475-499, 2023 | 13 | 2023 |
| A novel all NMOS leakage feedback with data retention technique R Lorenzo, S Chaudhary Control, Automation, Robotics and Embedded Systems (CARE), 2013 …, 2013 | 9 | 2013 |
| An effective design technique to reduce leakage power N Raj, R Lorenzo 2012 IEEE Students' Conference on Electrical, Electronics and Computer …, 2012 | 9 | 2012 |
| Optimal body bias to control stability, leakage and speed in SRAM cell R Lorenzo, S Chaudhury Journal of Circuits, Systems and Computers 25 (08), 1650096, 2016 | 8 | 2016 |
| Low power 10T SRAM cell with improved stability solving soft error issue R Lorenzo, R Paily TENCON 2019-2019 IEEE Region 10 Conference (TENCON), 2549-2553, 2019 | 7 | 2019 |
| Low leakage and minimum energy consumption in CMOS logic circuits R Lorenzo, S Chaudhary 2015 International Conference on Electronic Design, Computer Networks …, 2015 | 5 | 2015 |
| A new ultra low leakage and high speed technique for CMOS circuits R Lorenzo, S Chaudhury 2014 Students Conference on Engineering and Systems, 1-5, 2014 | 5 | 2014 |
| Analysis of leakage feedback technique R Lorenzo, S Chaudhury International Conference on Electronics, Communication and Instrumentation …, 2014 | 5 | 2014 |
| A 1.2 V, Radiation Hardened 14T SRAM Memory Cell for Aerospace Applications MP Kumar, R Lorenzo 2022 IEEE Silchar Subsection Conference (SILCON), 1-7, 2022 | 4 | 2022 |
| Low power 8t sram with high stability and bit interleaving capability R Lorenzo, DL Pradeep, AP Kumar 2022 2nd International Conference on Emerging Frontiers in Electrical and …, 2022 | 4 | 2022 |
| Comparative study of single gate and double gate fully depleted silicon on insulator MOSFET S Devi, A Singh, R Lorenzo, S Chaudhury 2015 Communication, Control and Intelligent Systems (CCIS), 357-362, 2015 | 4 | 2015 |
| Soft error immune RHBD-14t SRAM cell for space and satellite applications PK Mukku, R Lorenzo IEEE Access, 2023 | 3 | 2023 |
| Design and analysis of radiation hardened 10 T SRAM cell for space and terrestrial applications PK Mukku, R Lorenzo Microsystem Technologies, 1-12, 2023 | 3 | 2023 |
Saurabh ChaudhuryProfessor, NIT SilcharVerified email at nits.ac.in
