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Yong Lim
Yong Lim
Principal engineer, Samsung
Verified email at umich.edu
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Year
A fully integrated reprogrammable memristor–CMOS system for efficient multiply–accumulate operations
F Cai, JM Correll, SH Lee, Y Lim, V Bothra, Z Zhang, MP Flynn, WD Lu
Nature electronics 2 (7), 290-299, 2019
5872019
A 1 mW 71.5 dB SNDR 50 MS/s 13 bit fully differential ring amplifier based SAR-assisted pipeline ADC
Y Lim, MP Flynn
IEEE Journal of Solid-State Circuits 50 (12), 2901-2911, 2015
2272015
A 100 MS/s, 10.5 bit, 2.46 mW comparator-less pipeline ADC using self-biased ring amplifiers
Y Lim, MP Flynn
IEEE Journal of Solid-State Circuits 50 (10), 2331-2341, 2015
1762015
A 1.1 e-temporal noise 1/3.2-inch 8Mpixel CMOS image sensor using pseudo-multiple sampling
Y Lim, K Koh, K Kim, H Yang, J Kim, Y Jeong, S Lee, H Lee, SH Lim, ...
2010 IEEE International Solid-State Circuits Conference-(ISSCC), 396-397, 2010
942010
A calibration-free 2.3 mW 73.2 dB SNDR 15b 100 MS/s four-stage fully differential ring amplifier based SAR-assisted pipeline ADC
Y Lim, MP Flynn
2017 Symposium on VLSI Circuits, C98-C99, 2017
512017
Double data rate (DDR) counter, analog-to-digital converter (ADC) using the same, CMOS image sensor using the same and methods in DDR counter, ADC and CMOS image sensor
Y Lim, KM Koh, K Kim
US Patent 8,395,539, 2013
432013
Double data rate (DDR) counter, analog-to-digital converter (ADC) using the same, CMOS image sensor using the same and methods in DDR counter, ADC and CMOS image sensor
Y Lim, KM Koh, K Kim
US Patent 7,990,304, 2011
342011
A 16-channel noise-shaping machine learning analog-digital interface
FN Buhler, AE Mendrela, Y Lim, JA Fredenburg, MP Flynn
2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits), 1-2, 2016
292016
Pseudo-multiple sampling methods, systems and devices for analog-to-digital conversion
Y Lim
US Patent 7,554,479, 2009
282009
A fully integrated reprogrammable CMOS-RRAM compute-in-memory coprocessor for neuromorphic applications
JM Correll, V Bothra, F Cai, Y Lim, SH Lee, S Lee, WD Lu, Z Zhang, ...
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 6 …, 2020
272020
Analog-to-digital converter and devices including the same
CH Hwang, YJ Park, Y Lim, H Yang
US Patent 8,482,447, 2013
202013
Image sensor and camera system having the same
KM Koh, SH Ham, Y Lim
US Patent 8,773,544, 2014
172014
Analog to digital converters, image sensor systems, and methods of operating the same
SH Lim, K Yoo, KM Koh, P Yu-Jin, CH Hwang, Y Lim
US Patent 8,810,676, 2014
162014
A single-crystal-oscillator-based clock-management IC with 18× start-up time reduction and 0.68 ppm/ºC duty-cycled machine-learning-based RCO calibration
J Jung, S Oh, J Kim, G Ha, J Lee, S Kim, E Park, J Lee, Y Yoon, S Bae, ...
2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 58-60, 2022
152022
10.1 A 116μ W 104.4 dB-DR 100.6 dB-SNDR CT Δ∑ audio ADC using tri-level current-steering DAC with gate-leakage compensated off-transistor-based bias noise filter
C Lo, J Lee, Y Lim, Y Yoon, H Hwang, J Lee, MY Choi, M Lee, S Oh, J Lee
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 164-166, 2021
152021
A fully integrated reprogrammable memristor-CMOS system for efficient multiply-accumulate operations. Nat Electron 2 (7): 290–299
F Cai, JM Correll, SH Lee, Y Lim, V Bothra, Z Zhang, MP Flynn, WD Lu
152019
Dual-mode comparator and analog to digital converter having the same
H Yang, KH Lee, Y Lim, P Yu-Jin
US Patent 8,593,326, 2013
152013
Pixel Array, Read Out Circuit Therefor, Read Out Architecture Associated Therewith, Image Sensor And System Including The Same
Y Lim, KH Lee
US Patent App. 13/012,145, 2012
142012
A 1.5-GHz 6.144T Correlations/s 64 64 Cross-Correlator With 128 Integrated ADCs for Real-Time Synthetic Aperture Imaging
J Bell, P Knag, S Sun, Y Lim, T Chen, J Fredenburg, CH Chen, C Zhai, ...
IEEE Journal of Solid-State Circuits 52 (5), 1450-1457, 2017
112017
Pseudo-digital average sub sampling method and apparatus
Y Lim, KM Koh, SY Kim
US Patent 8,149,289, 2012
112012
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