Steve Furber
Steve Furber
Professor Emeritus, Department of Computer Science, The University of Manchester, UK
Verified email at - Homepage
Cited by
Cited by
Principles asynchronous circuit design
J Spars, S Furber
Kluwer academic publishers, 2002
The spinnaker project
SB Furber, F Galluppi, S Temple, LA Plana
Proceedings of the IEEE 102 (5), 652-665, 2014
Overview of the SpiNNaker system architecture
SB Furber, DR Lester, LA Plana, JD Garside, E Painkras, S Temple, ...
IEEE transactions on computers 62 (12), 2454-2467, 2012
ARM system-on-chip architecture
SB Furber
Addison-Wesley Professional, 2000
Large-scale neuromorphic computing systems
S Furber
Journal of neural engineering 13 (5), 051001, 2016
SpiNNaker: A 1-W 18-core system-on-chip for massively-parallel neural network simulation
E Painkras, LA Plana, J Garside, S Temple, F Galluppi, C Patterson, ...
IEEE Journal of Solid-State Circuits 48 (8), 1943-1953, 2013
SpiNNaker: mapping neural networks onto a massively-parallel chip multiprocessor
MM Khan, DR Lester, LA Plana, A Rast, X Jin, E Painkras, SB Furber
Neural Networks, 2008. IJCNN 2008.(IEEE World Congress on Computational …, 2008
2022 roadmap on neuromorphic computing and engineering
DV Christensen, R Dittmann, B Linares-Barranco, A Sebastian, ...
Neuromorphic Computing and Engineering 2 (2), 022501, 2022
Four-phase micropipeline latch control circuits
SB Furber, P Day
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 4 (2), 247-253, 1996
Chain: a delay-insensitive chip area interconnect
J Bainbridge, S Furber
IEEE Micro 22 (5), 16-23, 2002
AMULET2e: An asynchronous embedded controller
SB Furber, JD Garside, S Temple, J Liu, P Day, NC Paver
Advanced Research in Asynchronous Circuits and Systems, 1997. Proceedings …, 1997
ARM system Architecture
SB Furber
Addison-Wesley Longman Publishing Co., Inc., 1996
Neural systems engineering
S Furber, S Temple
Journal of the Royal Society interface 4 (13), 193-206, 2007
A GALS infrastructure for a massively parallel multiprocessor
LA Plana, SB Furber, S Temple, M Khan, Y Shi, J Wu, S Yang
IEEE Design & Test of Computers 24 (5), 454-463, 2007
Introducing SLAMBench, a performance and accuracy benchmarking methodology for SLAM
L Nardi, B Bodin, MZ Zia, J Mawer, A Nisbet, PHJ Kelly, AJ Davison, ...
2015 IEEE international conference on robotics and automation (ICRA), 5783-5790, 2015
Micropipelined ARM
SB Furber, P Day, JD Garside, NC Paver, JV Woods
Elsevier BV, 1994
Performance comparison of the digital neuromorphic hardware SpiNNaker and the neural network simulation software NEST for a full-scale cortical microcircuit model
SJ Van Albada, AG Rowley, J Senk, M Hopkins, M Schmidt, AB Stokes, ...
Frontiers in neuroscience 12, 291, 2018
Delay insensitive system-on-chip interconnect using 1-of-4 data encoding
WJ Bainbridge, SB Furber
Proceedings Seventh International Symposium on Asynchronous Circuits and …, 2001
Delay-insensitive, point-to-point interconnect using m-of-n codes
WJ Bainbridge, WB Toms, DA Edwards, SB Furber
Ninth International Symposium on Asynchronous Circuits and Systems, 2003 …, 2003
AMULET1: a micropipelined ARM
SB Furber, P Day, JD Garside, NC Paver, JV Woods
Compcon Spring'94, Digest of Papers., 476-485, 1994
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