| Scheduling heterogeneous multi-cores through Performance Impact Estimation (PIE) K Van Craeynest, A Jaleel, L Eeckhout, P Narvaez, J Emer Proceedings of the 39th International Symposium on Computer Architecture …, 2012 | 453 | 2012 |
| Fairness-aware scheduling on single-ISA heterogeneous multi-cores K Van Craeynest, S Akram, W Heirman, A Jaleel, L Eeckhout Proceedings of the 22nd international conference on Parallel architectures …, 2013 | 130 | 2013 |
| Barrierpoint: Sampled simulation of multi-threaded applications TE Carlson, W Heirman, K Van Craeynest, L Eeckhout 2014 IEEE International Symposium on Performance Analysis of Systems and …, 2014 | 73 | 2014 |
| Understanding fundamental design choices in single-isa heterogeneous multicore architectures K Van Craeynest, L Eeckhout ACM Transactions on Architecture and Code Optimization (TACO) 9 (4), 1-23, 2013 | 48 | 2013 |
| Providing an asymmetric multicore processor system transparently to an operating system B Ginzburg, I Osadchiy, R Ronen, E Weissmann, M Mishaeli, A Naveh, ... US Patent 9,720,730, 2017 | 46 | 2017 |
| Undersubscribed threading on clustered cache architectures W Heirman, TE Carlson, K Van Craeynest, I Hur, A Jaleel, L Eeckhout 2014 IEEE 20th International Symposium on High Performance Computer …, 2014 | 38 | 2014 |
| The multi-program performance model: debunking current practice in multi-core simulation K Van Craeynest, L Eeckhout 2011 IEEE International Symposium on Workload Characterization (IISWC), 26-37, 2011 | 27 | 2011 |
| Boosting the priority of garbage: Scheduling collection on heterogeneous multicore processors S Akram, JB Sartor, KV Craeynest, W Heirman, L Eeckhout ACM Transactions on Architecture and Code Optimization (TACO) 13 (1), 1-25, 2016 | 20 | 2016 |
| Automatic SMT threading for OpenMP applications on the Intel Xeon Phi co-processor W Heirman, TE Carlson, K Van Craeynest, I Hur, A Jaleel, L Eeckhout Proceedings of the 4th international workshop on runtime and operating …, 2014 | 20 | 2014 |
| MLP-aware runahead threads in a simultaneous multithreading processor K Van Craeynest, S Eyerman, L Eeckhout High Performance Embedded Architectures and Compilers: Fourth International …, 2009 | 18 | 2009 |
| Chrysso: An integrated power manager for constrained many-core processors SS Jha, W Heirman, A Falcón, TE Carlson, K Van Craeynest, J Tubella, ... Proceedings of the 12th ACM International Conference on Computing Frontiers, 1-8, 2015 | 13 | 2015 |
| Node performance and energy analysis with the sniper multi-core simulator TE Carlson, W Heirman, K Van Craeynest, L Eeckhout Tools for High Performance Computing 2013: Proceedings of the 7th …, 2014 | 1 | 2014 |
| Processor scheduling with thread performance estimation on cores of different types A Jaleel, K Van Craeynest, P Narvaez, J Emer US Patent 9,286,128, 2016 | | 2016 |
| K. Koukos A. Ros E. Hagersten S Kaxiras, Z Wang, X Wang, F Hou, Y Luo, S Chai, M Isnardi, S Lim, ... ACM Transactions on 13 (1), 2016 | | 2016 |
| Modeling and scheduling heterogeneous multi-core architectures K Van Craeynest Ghent University, 2013 | | 2013 |
| Optimaliseren van geheugenparallellisme in een SMT processor. K Van Craeynest | | 2007 |
| RETROSPECTIVE: Scheduling Heterogeneous Multi-Cores through Performance Impact Estimation (PIE) K Van Craeynest, A Jaleel, L Eeckhout, P Narvaez, J Emer memory 10 (12), 14, 0 | | |
