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Lei Yang
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Hardware/software co-exploration of neural architectures
W Jiang, L Yang, EHM Sha, Q Zhuge, S Gu, S Dasgupta, Y Shi, J Hu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020
1562020
Accuracy vs. efficiency: Achieving both through fpga-implementation aware neural architecture search
W Jiang, X Zhang, EHM Sha, L Yang, Q Zhuge, Y Shi, J Hu
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
1552019
Co-exploration of neural architectures and heterogeneous asic accelerator designs targeting multiple tasks
L Yang, Z Yan, M Li, H Kwon, L Lai, T Krishna, V Chandra, W Jiang, Y Shi
2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020
1202020
Achieving super-linear speedup across multi-fpga for real-time dnn inference
W Jiang, EHM Sha, X Zhang, L Yang, Q Zhuge, Y Shi, J Hu
ACM Transactions on Embedded Computing Systems (TECS) 18 (5s), 1-23, 2019
842019
Device-circuit-architecture co-exploration for computing-in-memory neural accelerators
W Jiang, Q Lou, Z Yan, L Yang, J Hu, XS Hu, Y Shi
IEEE Transactions on Computers 70 (4), 595-605, 2020
792020
Standing on the shoulders of giants: Hardware and neural architecture co-search with hot start
W Jiang, L Yang, S Dasgupta, J Hu, Y Shi
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020
702020
Task mapping on SMART NoC: Contention matters, not the distance
L Yang, W Liu, P Chen, N Guan, M Li
Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017
462017
Co-exploring neural architecture and network-on-chip design for real-time artificial intelligence
L Yang, W Jiang, W Liu, HM Edwin, Y Shi, J Hu
2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 85-90, 2020
402020
Thermal-aware task mapping on dynamically reconfigurable network-on-chip based multiprocessor system-on-chip
W Liu, L Yang, W Jiang, L Feng, N Guan, W Zhang, N Dutt
IEEE Transactions on Computers 67 (12), 1818-1834, 2018
392018
Application mapping and scheduling for network-on-chip-based multiprocessor system-on-chip with fine-grain communication optimization
L Yang, W Liu, W Jiang, M Li, J Yi, EHM Sha
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (10 …, 2016
382016
Heterogeneous fpga-based cost-optimal design for timing-constrained cnns
W Jiang, EHM Sha, Q Zhuge, L Yang, X Chen, J Hu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
352018
FoToNoC: A folded torus-like network-on-chip based many-core systems-on-chip in the dark silicon era
L Yang, W Liu, W Jiang, M Li, P Chen, EHM Sha
IEEE Transactions on Parallel and Distributed Systems 28 (7), 1905-1918, 2016
352016
Can noise on qubits be learned in quantum neural network? a case study on quantumflow
Z Liang, Z Wang, J Yang, L Yang, Y Shi, W Jiang
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-7, 2021
252021
Chip temperature optimization for dark silicon many-core systems
M Li, W Liu, L Yang, P Chen, C Chen
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
242017
Federated contrastive learning for dermatological disease diagnosis via on-device learning
Y Wu, D Zeng, Z Wang, Y Sheng, L Yang, AJ James, Y Shi, J Hu
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-7, 2021
182021
The larger the fairer? small neural networks can achieve fairness for edge devices
Y Sheng, J Yang, Y Wu, K Mao, Y Shi, J Hu, W Jiang, L Yang
Proceedings of the 59th ACM/IEEE Design Automation Conference, 163-168, 2022
172022
Energy-efficient application mapping and scheduling for lifetime guaranteed MPSoCs
W Liu, J Yi, M Li, P Chen, L Yang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
172018
FoToNoC: A hierarchical management strategy based on folded torus-like network-on-chip for dark silicon many-core systems
L Yang, W Liu, W Jiang, M Li, J Yi, EHM Sha
2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 725-730, 2016
162016
Optimal application mapping and scheduling for network-on-chips with computation in STT-RAM based router
L Yang, W Liu, N Guan, N Dutt
IEEE Transactions on Computers 68 (8), 1174-1189, 2018
152018
Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems
L Yang, W Liu, N Guan, M Li, P Chen, HM Edwin
2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 494-499, 2017
152017
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