| FLUX chip: design of a 20-GHz 16-bit ultrapipelined RSFQ processor prototype based on 1.75-/spl mu/m LTS technology M Dorojevets, P Bunyk, D Zinoviev IEEE transactions on applied superconductivity 11 (1), 326-332, 2001 | 149 | 2001 |
| 20 GHz operation of an asynchronous wave-pipelined RSFQ arithmetic-logic unit TV Filippov, A Sahu, AF Kirichenko, IV Vernik, M Dorojevets, CL Ayala, ... Physics Procedia 36, 59-65, 2012 | 127 | 2012 |
| FLUX-1 RSFQ microprocessor: Physical design and test results P Bunyk, M Leung, J Spargo, M Dorojevets IEEE transactions on applied superconductivity 13 (2), 433-436, 2003 | 107 | 2003 |
| 8-bit asynchronous wave-pipelined RSFQ arithmetic-logic unit T Filippov, M Dorojevets, A Sahu, A Kirichenko, C Ayala, O Mukhanov IEEE transactions on applied superconductivity 21 (3), 847-851, 2011 | 89 | 2011 |
| COOL-0: Design of an RSFQ subsystem for petaflops computing M Dorojevets, P Bunyk, D Zinoviev, K Likharev IEEE transactions on applied superconductivity 9 (2), 3606-3614, 1999 | 51 | 1999 |
| Parallel vector processing M Dorojevets, E Ogura US Patent 7,196,708, 2007 | 50 | 2007 |
| 8-Bit Asynchronous Sparse-Tree Superconductor RSFQ Arithmetic Logic Unit With a Rich Set of Operations M Dorojevets, C Ayala, N Yoshikawa, A Fujimaki IEEE, 2013 | 47 | 2013 |
| 16-bit wave-pipelined sparse-tree RSFQ adder M Dorojevets, CL Ayala, N Yoshikawa, A Fujimaki IEEE transactions on applied superconductivity 23 (3), 1700605-1700605, 2012 | 44 | 2012 |
| Architectural and implementation challenges in designing high-performance RSFQ processors: A FLUX-1 microprocessor and beyond M Dorojevets, P Bunyk IEEE transactions on applied superconductivity 13 (2), 446-449, 2003 | 40 | 2003 |
| Data-flow microarchitecture for wide datapath RSFQ processors: Design study M Dorojevets, CL Ayala, AK Kasperek IEEE Transactions on Applied Superconductivity 21 (3), 787-791, 2010 | 37 | 2010 |
| Towards 32-bit energy-efficient superconductor RQL processors: The cell-level design and analysis of key processing and on-chip storage units M Dorojevets, Z Chen, CL Ayala, AK Kasperek IEEE Transactions on Applied Superconductivity 25 (3), 1-8, 2014 | 35 | 2014 |
| 20 GHz 8x8-Bit Parallel Carry-Save Superconductor RSFQ Multiplier M Dorojevets, A Kasperek, N Yoshikawa, A Fujimaki IEEE, 2013 | 35* | 2013 |
| The El'brus-3 and MARS-M: recent advances in Russian high-performance computing MN Dorozhevets, P Wolcott The Journal of Supercomputing 6 (1), 5-48, 1992 | 29 | 1992 |
| Development and evaluation of design techniques for high-performance wave-pipelined wide datapath RSFQ processors M Dorojevets, C Ayala, A Kasperek Proc. ISEC 46, 2009 | 27 | 2009 |
| Multithreaded decoupled architecture MN Dorojevets, VG Oklobdzija International Journal of High Speed Computing 7 (03), 465-480, 1995 | 27 | 1995 |
| Development of superconductor electronics technology for high-end computing A Silver, A Kleinsasser, G Kerber, Q Herr, M Dorojevets, P Bunyk, ... Superconductor Science and Technology 16 (12), 1368, 2003 | 25 | 2003 |
| 2D block processing architecture M Dorojevets, E Ogura US Patent App. 10/816,391, 2005 | 21 | 2005 |
| An 8-bit FLUX-1 RSFQ microprocessor built in 1.75-μm technology M Dorojevets Physica C: Superconductivity 378, 1446-1453, 2002 | 18 | 2002 |
| Superconductor electronic devices for petaflops computing M Dorojevets, P Bunyk, D Zinoviev, K Likharev FED Journal 10 (3), 1999 | 16 | 1999 |
| Fast pipelined storage for high-performance energy-efficient computing with superconductor technology M Dorojevets, Z Chen 2015 12th International Conference & Expo on Emerging Technologies for a …, 2015 | 15 | 2015 |
