| MAERI: Enabling Flexible Dataflow Mapping over DNN Accelerators via Reconfigurable Interconnects H Kwon, A Samajdar, T Krishna Proceedings of ACM International Conference on Architectural Support for …, 2018 | 437 | 2018 |
| SIGMA: A Sparse and Irregular GEMM Accelerator with Flexible Interconnects for DNN Training E Qin, A Samajdar, H Kwon, V Nadella, S Srinivasan, D Das, B Kaul, ... Proceedings of the 26th IEEE International Symposium on High-Performance …, 2020 | 322 | 2020 |
| Understanding reuse, performance, and hardware cost of dnn dataflow: A data-centric approach H Kwon, P Chatarasi, M Pellauer, A Parashar, V Sarkar, T Krishna Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 242 | 2019 |
| Multi-scale high-resolution vision transformer for semantic segmentation J Gu, H Kwon, D Wang, W Ye, M Li, YH Chen, L Lai, V Chandra, DZ Pan Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern …, 2022 | 126* | 2022 |
| Co-exploration of neural architectures and heterogeneous asic accelerator designs targeting multiple tasks L Yang, Z Yan, M Li, H Kwon, L Lai, T Krishna, V Chandra, W Jiang, Y Shi 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 118 | 2020 |
| Maestro: A data-centric approach to understand reuse, performance, and hardware cost of dnn mappings H Kwon, P Chatarasi, V Sarkar, T Krishna, M Pellauer, A Parashar IEEE micro 40 (3), 20-29, 2020 | 112 | 2020 |
| Heterogeneous dataflow accelerators for multi-DNN workloads H Kwon, L Lai, M Pellauer, T Krishna, YH Chen, V Chandra 2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021 | 106* | 2021 |
| Rethinking NoCs for spatial neural network accelerators H Kwon, A Samajdar, T Krishna 2017 Eleventh IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 1-8, 2017 | 77 | 2017 |
| OpenSMART: Single-cycle multi-hop NoC generator in BSV and Chisel H Kwon, T Krishna 2017 IEEE International Symposium on Performance Analysis of Systems and …, 2017 | 56 | 2017 |
| Architecture, chip, and package co-design flow for 2.5 D IC design enabling heterogeneous IP reuse J Kim, G Murali, H Park, E Qin, H Kwon, V Chaitanya, K Chekuri, N Dasari, ... Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 46 | 2019 |
| Architecture, chip, and package codesign flow for interposer-based 2.5-D chiplet integration enabling heterogeneous IP reuse J Kim, G Murali, H Park, E Qin, H Kwon, VCK Chekuri, NM Rahman, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (11 …, 2020 | 41 | 2020 |
| Architecting a secure wireless network-on-chip B Lebiednik, S Abadal, H Kwon, T Krishna 2018 Twelfth IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 1-8, 2018 | 35 | 2018 |
| mRNA: Enabling Efficient Mapping Space Exploration for a Reconfigurable Neural Accelerator Z Zhao, H Kwon, S Kuhar, W Sheng, Z Mao, T Krishna 2019 IEEE International Symposium on Performance Analysis of Systems and …, 2019 | 31 | 2019 |
| Marvel: A data-centric compiler for dnn operators on spatial accelerators P Chatarasi, H Kwon, N Raina, S Malik, V Haridas, A Parashar, ... arXiv preprint arXiv:2002.07752, 2020 | 26 | 2020 |
| Flexion: A Quantitative Metric for Flexibility in DNN Accelerators H Kwon, M Pellauer, A Parashar, T Krishna IEEE Computer Architecture Letters - Preprint, 1-1, 2020 | 16 | 2020 |
| Evaluating spatial accelerator architectures with tiled matrix-matrix multiplication GE Moon, H Kwon, G Jeong, P Chatarasi, S Rajamanickam, T Krishna IEEE Transactions on Parallel and Distributed Systems 33 (4), 1002-1014, 2021 | 15 | 2021 |
| Marvel: a data-centric approach for mapping deep learning operators on spatial accelerators P Chatarasi, H Kwon, A Parashar, M Pellauer, T Krishna, V Sarkar ACM Transactions on Architecture and Code Optimization (TACO) 19 (1), 1-26, 2021 | 13 | 2021 |
| Data orchestration in deep learning accelerators T Krishna, H Kwon, A Parashar, M Pellauer, A Samajdar Morgan & Claypool Publishers 15, 1-164, 2020 | 13 | 2020 |
| A communication-centric approach for designing flexible DNN accelerators H Kwon, A Samajdar, T Krishna IEEE Micro 38 (6), 25-35, 2018 | 13 | 2018 |
| Dataflow-architecture co-design for 2.5 D DNN accelerators using wireless network-on-package R Guirado, H Kwon, S Abadal, E Alarcón, T Krishna 2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC), 806-812, 2021 | 12 | 2021 |
Tushar KrishnaAssociate Professor, Georgia TechVerified email at ece.gatech.edu
