Bruce Jacob
Bruce Jacob
Verified email at - Homepage
Cited by
Cited by
Memory systems: cache, DRAM, disk
B Jacob, D Wang, S Ng
Morgan Kaufmann, 2010
DRAMSim2: A cycle accurate memory system simulator
P Rosenfeld, E Cooper-Balis, B Jacob
IEEE computer architecture letters 10 (1), 16-19, 2011
Dramsim: a memory system simulator
D Wang, B Ganesh, N Tuaycharoen, K Baynes, A Jaleel, B Jacob
ACM SIGARCH Computer Architecture News 33 (4), 100-107, 2005
The structural simulation toolkit
AF Rodrigues, KS Hemmert, BW Barrett, C Kersey, R Oldfield, M Weston, ...
ACM SIGMETRICS Performance Evaluation Review 38 (4), 37-42, 2011
A performance comparison of contemporary DRAM architectures
V Cuppu, B Jacob, B Davis, T Mudge
Proceedings of the 26th annual international symposium on Computer …, 1999
The performance of PC solid-state disks (SSDs) as a function of bandwidth, concurrency, device architecture, and system organization
C Dirik, B Jacob
ACM SIGARCH Computer Architecture News 37 (3), 279-289, 2009
Technology comparison for large last-level caches (L3Cs): Low-leakage SRAM, low write-energy STT-RAM, and refresh-optimized eDRAM
MT Chang, P Rosenfeld, SL Lu, B Jacob
2013 IEEE 19th international symposium on high performance computer …, 2013
CMP $ im: A Pin-based on-the-fly multi-core cache simulator
A Jaleel, RS Cohn, CK Luk, B Jacob
Proceedings of the Fourth Annual Workshop on Modeling, Benchmarking and …, 2008
Biobench: A benchmark suite of bioinformatics applications
K Albayraktaroglu, A Jaleel, X Wu, M Franklin, B Jacob, CW Tseng, ...
IEEE International Symposium on Performance Analysis of Systems and Software …, 2005
Composing with genetic algorithms
B Jacob
International Computer Music Association, 1995
Hardware support for real-time operating systems
P Kohout, B Ganesh, B Jacob
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware …, 2003
Last level cache (llc) performance of data mining workloads on a cmp-a case study of parallel bioinformatics workloads
A Jaleel, M Mattina, B Jacob
The Twelfth International Symposium on High-Performance Computer …, 2006
A look at several memory management units, TLB-refill mechanisms, and page table organizations
BL Jacob, TN Mudge
ACM SIGPLAN Notices 33 (11), 295-306, 1998
Virtual memory in contemporary microprocessors
B Jacob, T Mudge
IEEE Micro 18 (4), 60-75, 1998
Algorithmic composition as a model of creativity
BL Jacob
Organised Sound 1 (3), 157-165, 1996
A control-theoretic approach to dynamic voltage scheduling
A Varma, B Ganesh, M Sen, SR Choudhury, L Srinivasan, B Jacob
Proceedings of the 2003 international conference on Compilers, architecture …, 2003
DRAM refresh mechanisms, penalties, and trade-offs
I Bhati, MT Chang, Z Chishti, SL Lu, B Jacob
IEEE Transactions on Computers 65 (1), 108-121, 2015
Flexible auto-refresh: Enabling scalable and energy-efficient DRAM refresh reductions
I Bhati, Z Chishti, SL Lu, B Jacob
Proceedings of the 42nd Annual International Symposium on Computer …, 2015
Virtual memory: Issues of implementation
B Jacob, T Mudge
Computer 31 (6), 33-43, 1998
An analytical model for designing memory hierarchies
BL Jacob, PM Chen, SR Silverman, TN Mudge
IEEE Transactions on Computers 45 (10), 1180-1194, 1996
The system can't perform the operation now. Try again later.
Articles 1–20