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Ben Varkey Benjamin Pottayil
Ben Varkey Benjamin Pottayil
Other namesB V Benjamin, B Benjamin
Founding Engineer, Dexterity Inc.
Verified email at alumni.stanford.edu
Title
Cited by
Cited by
Year
Neurogrid: A mixed-analog-digital multichip system for large-scale neural simulations
BV Benjamin, P Gao, E McQuinn, S Choudhary, AR Chandrasekaran, ...
Proceedings of the IEEE 102 (5), 699-716, 2014
13552014
Braindrop: A mixed-signal neuromorphic architecture with a dynamical systems-based programming model
A Neckar, S Fok, BV Benjamin, TC Stewart, NN Oza, AR Voelker, ...
Proceedings of the IEEE 107 (1), 144-164, 2018
2152018
Dynamical system guided mapping of quantitative neuronal models onto neuromorphic hardware
P Gao, BV Benjamin, K Boahen
IEEE Transactions on Circuits and Systems I: Regular Papers 59 (10), 2383-2394, 2012
402012
Extending the neural engineering framework for nonideal silicon synapses
AR Voelker, BV Benjamin, TC Stewart, K Boahen, C Eliasmith
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017
182017
A population-level approach to temperature robustness in neuromorphic systems
E Kauderer-Abrams, A Gilbert, A Voelker, B Benjamin, TC Stewart, ...
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017
152017
A superposable silicon synapse with programmable reversal potential
BV Benjamin, JV Arthur, P Gao, P Merolla, K Boahen
2012 Annual International Conference of the IEEE Engineering in Medicine and …, 2012
142012
Autonomous unknown object pick and place
KJ Chavez, Z Sun, RA Pidaparthi, T Morris-Downing, HZ Su, BVB Pottayil, ...
US Patent 11,813,758, 2023
132023
Neurogrid simulates cortical cell-types, active dendrites, and top-down attention
BV Benjamin, NA Steinmetz, NN Oza, JJ Aguayo, K Boahen
Neuromorphic Computing and Engineering 1 (1), 013001, 2021
122021
Optimizing an analog neuron circuit design for nonlinear function approximation
A Neckar, TC Stewart, BV Benjamin, K Boahen
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
82018
An analytical MOS device model with mismatch and temperature variation for subthreshold circuits
BV Benjamin, RL Smith, KA Boahen
IEEE Transactions on Circuits and Systems II: Express Briefs, 2023
52023
Methods and apparatus for spiking neural network computing based on threshold accumulation
KA Boahen, SB Fok, AS Neckar, BVB Pottayil, T Stewart, NN Oza, ...
US Patent App. 16/508,123, 2020
52020
Robotic system simulation engine
Z Sun, WA Clary, KJ Chavez, BVB Pottayil, RA Pidaparthi, RL Hau, ...
US Patent 11,931,902, 2024
42024
Methods and apparatus for spiking neural network computing based on a multi-layer kernel architecture
KA Boahen, SB Fok, AS Neckar, BVB Pottayil, TC Stewart, NN Oza, ...
US Patent App. 16/508,115, 2020
32020
Workflow for using learning based approach for placing boxes on pallets
RA Pidaparthi, WA Clary, N Abhyankar, J Kuck, BVB Pottayil, KJ Chavez, ...
US Patent App. 17/838,045, 2022
22022
Technique for generation of load-slew indices for circuit characterization
BV Benjamin
US Patent 8,352,901, 2013
22013
Multi-pallet mixed-case robotic palletizer
A Dupree, R Moreno, S Perez, W Hyslop, A Kell, BVB Pottayil
US Patent App. 17/343,606, 2022
12022
Technique for digital circuit functionality recognition for circuit characterization
BV Benjamin
US Patent 7,899,660, 2011
12011
Autonomous unknown object pick and place
KJ Chavez, Z Sun, RA Pidaparthi, T Morris-Downing, HZ Su, BVB Pottayil, ...
US Patent App. 18/485,212, 2024
2024
A Low Thermal Sensitivity Subthreshold-Current to Pulse-Frequency Converter for Neuromorphic Chips
BV Benjamin, RL Smith, KA Boahen
IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2023
2023
Simulated box placement for algorithm evaluation and refinement
RA Pidaparthi, WA Clary, N Abhyankar, J Kuck, BVB Pottayil, KJ Chavez, ...
US Patent App. 17/837,779, 2022
2022
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