| Soft-error detection using control flow assertions O Goloubeva, M Rebaudengo, MS Reorda, M Violante Proceedings 18th IEEE Symposium on Defect and Fault Tolerance in VLSI …, 2003 | 326 | 2003 |
| Soft-error detection through software fault-tolerance techniques M Rebaudengo, MS Reorda, M Torchiano, M Violante Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance …, 1999 | 233 | 1999 |
| Software-implemented hardware fault tolerance O Goloubeva, M Rebaudengo, MS Reorda, M Violante Springer Science & Business Media, 2006 | 212 | 2006 |
| A new reliability-oriented place and route algorithm for SRAM-based FPGAs L Sterpone, M Violante IEEE Transactions on Computers 55 (6), 732-744, 2006 | 204 | 2006 |
| Virtual interactive e‐learning application: An evaluation of the student satisfaction MG Violante, E Vezzetti Computer Applications in Engineering Education 23 (1), 72-91, 2015 | 185 | 2015 |
| Identification and classification of single-event upsets in the configuration memory of SRAM-based FPGAs M Ceschia, M Violante, MS Reorda, A Paccagnella, P Bernardi, ... IEEE Transactions on Nuclear Science 50 (6), 2088-2094, 2003 | 175 | 2003 |
| Analysis of the robustness of the TMR architecture in SRAM-based FPGAs L Sterpone, M Violante IEEE Transactions on Nuclear Science 52 (5), 1545-1549, 2005 | 169 | 2005 |
| Low power BIST via non-linear hybrid cellular automata F Corno, M Rebaudengo, MS Reorda, G Squillero, M Violante Proceedings 18th IEEE VLSI Test Symposium, 29-34, 2000 | 167 | 2000 |
| Kano qualitative vs quantitative approaches: An assessment framework for products attributes analysis MG Violante, E Vezzetti Computers in industry 86, 15-25, 2017 | 160 | 2017 |
| A new partial reconfiguration-based fault-injection system to evaluate SEU effects in SRAM-based FPGAs L Sterpone, M Violante IEEE Transactions on Nuclear Science 54 (4), 965-970, 2007 | 153 | 2007 |
| Experimentally evaluating an automatic approach for generating safety-critical software with respect to transient errors P Cheynet, B Nicolescu, R Velazco, M Rebaudengo, MS Reorda, ... IEEE Transactions on Nuclear Science 47 (6), 2231-2236, 2000 | 152 | 2000 |
| A source-to-source compiler for generating dependable software M Rebaudengo, MS Reorda, M Violante, M Torchiano Proceedings First IEEE International Workshop on Source Code Analysis and …, 2001 | 141 | 2001 |
| Evaluating the effects of SEUs affecting the configuration memory of an SRAM-based FPGA M Bellato, P Bernardi, D Bortolato, A Candelori, M Ceschia, ... Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 132 | 2004 |
| An FPGA-based approach for speeding-up fault injection campaigns on safety-critical circuits P Civera, L Macchiarulo, M Rebaudengo, MS Reorda, M Violante Journal of Electronic Testing 18, 261-271, 2002 | 129 | 2002 |
| Implementing a new approach for the design of an e‐learning platform in engineering education MG Violante, E Vezzetti Computer Applications in Engineering Education 22 (4), 708-727, 2014 | 128 | 2014 |
| A new analytical approach to estimate the effects of SEUs in TMR architectures implemented through SRAM-based FPGAs L Sterpone, M Violante IEEE Transactions on Nuclear Science 52 (6), 2217-2223, 2005 | 126 | 2005 |
| Commonly used external TAM variables in e-learning, agriculture and virtual reality applications IA Castiblanco Jimenez, LC Cepeda García, MG Violante, F Marcolin, ... Future Internet 13 (1), 7, 2020 | 120 | 2020 |
| Exploiting circuit emulation for fast hardness evaluation P Civera, L Macchiarulo, M Rebaudengo, MS Reorda, M Violante IEEE Transactions on Nuclear Science 48 (6), 2210-2216, 2001 | 119 | 2001 |
| On the test of microprocessor IP cores F Corno, MS Reorda, G Squillero, M Violante Proceedings Design, Automation and Test in Europe. Conference and Exhibition …, 2001 | 113 | 2001 |
| An in-vehicle infotainment software architecture based on google android G Macario, M Torchiano, M Violante 2009 IEEE International Symposium on Industrial Embedded Systems, 257-260, 2009 | 108 | 2009 |
Matteo SONZA REORDAPolitecnico di Torino, Dept. of Control and Computer EngineeringVerified email at polito.it
