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Jaewon Lee
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Year
RISC-V FPGA platform toward ROS-based robotics application
J Lee, H Chen, J Young, H Kim
2020 30th International Conference on Field-Programmable Logic and …, 2020
122020
Device including a single wire interface and a data processing system having the same
J Huh, H Jang, T Scherrer, J Lee
US Patent 10,133,692, 2018
92018
COX: Exposing CUDA warp-level functions to CPUs
R Han, J Lee, J Sim, H Kim
ACM Transactions on Architecture and Code Optimization (TACO) 19 (4), 1-25, 2022
8*2022
Proof of phone: A low-cost blockchain platform
JM Kim, JW Lee, K Lee, J Huh
2019 IEEE International Conference on Consumer Electronics (ICCE), 1-4, 2019
82019
Securing GPU via region-based bounds checking
J Lee, Y Kim, J Cao, E Kim, J Lee, H Kim
The 49th Annual International Symposium on Computer Architecture, 27-41, 2022
52022
Supporting CUDA for an extended RISC-V GPU architecture
R Han, B Tine, J Lee, J Sim, H Kim
Workshop on Computer Architecture Research with RISC-V, 2021
22021
Hardware-Assisted Code-Pointer Tagging for Forward-Edge Control-Flow Integrity
Y Kim, A Kar, J Lee, J Lee, H Kim
IEEE Computer Architecture Letters 22 (2), 117-120, 2023
2023
RV-CURE: A RISC-V Capability Architecture for Full Memory Safety
Y Kim, A Kar, J Lee, J Lee, H Kim
arXiv preprint arXiv:2308.02945, 2023
2023
Secure Location-Aware Authentication and Communication for Intelligent Transportation Systems
NS Ghalehshahi, R Hadidi, L Jaewon, J Chen, A Siqueria, R Rajan, ...
arXiv preprint arXiv:2011.08936, 2020
2020
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