| FlexGripPlus: An improved GPGPU model to support reliability analysis JER Condia, B Du, MS Reorda, L Sterpone Microelectronics Reliability 109, 113660, 2020 | 65 | 2020 |
| Revealing GPUs Vulnerabilities by Combining Register-Transfer and Software-Level Fault Injection FF dos Santos, JER Condia, L Carro, MS Reorda, P Rech 2021 51st Annual IEEE/IFIP International Conference on Dependable Systems …, 2021 | 30 | 2021 |
| Combining Architectural Simulation and Software Fault Injection for a Fast and Accurate CNNs Reliability Evaluation on GPUs JER Condia, FF dos Santos, MS Reorda, P Rech 2021 IEEE 39th VLSI Test Symposium (VTS), 1-7, 2021 | 26 | 2021 |
| Testing permanent faults in pipeline registers of GPGPUs: A multi-kernel approach JER Condia, MS Reorda 2019 IEEE 25th International Symposium on On-Line Testing and Robust System …, 2019 | 26 | 2019 |
| About the functional test of the GPGPU scheduler B Du, JER Condia, MS Reorda, L Sterpone 2018 IEEE 24th International Symposium on On-Line Testing And Robust System …, 2018 | 23 | 2018 |
| A multi-level approach to evaluate the impact of gpu permanent faults on cnn's reliability JER Condia, JD Guerrero-Balaguera, FF Dos Santos, MS Reorda, P Rech 2022 IEEE International Test Conference (ITC), 278-287, 2022 | 22 | 2022 |
| An extended model to support detailed GPGPU reliability analysis B Du, JER Condia, MS Reorda 2019 14th International Conference on Design & Technology of Integrated …, 2019 | 21 | 2019 |
| An On-Line Testing Technique for the Scheduler Memory of a GPGPU S Di Carlo, JER Condia, MS Reorda IEEE Access 8, 16893-16912, 2020 | 17 | 2020 |
| On the evaluation of SEU effects in GPGPUs B Du, JER Condia, MS Reorda, L Sterpone 2019 IEEE Latin American Test Symposium (LATS), 1-6, 2019 | 17 | 2019 |
| On the Functional Test of Special Function Units in GPUs JD Guerrero-Balaguera, JER Condia, MS Reorda 2021 24th International Symposium on Design and Diagnostics of Electronic …, 2021 | 14 | 2021 |
| Improving GPU register file reliability with a comprehensive ISA extension MM Gonçalves, JER Condia, MS Reorda, L Sterpone, JR Azambuja Microelectronics Reliability 114, 113768, 2020 | 11 | 2020 |
| Understanding the Effects of Permanent Faults in GPU's Parallelism Management and Control Units JD Guerrero Balaguera, JE Rodriguez Condia, F Fernandes Dos Santos, ... Proceedings of the International Conference for High Performance Computing …, 2023 | 10 | 2023 |
| Analyzing the Impact of Different Real Number Formats on the Structural Reliability of TCUs in GPUs RL Sierra, JD Guerrero-Balaguera, JER Condia, MS Reorda 2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration …, 2023 | 10 | 2023 |
| Using STLs for Effective In-Field Test of GPUs JER Condia, FA da Silva, AÇ Bağbaga, JD Guerrero-Balaguera, ... IEEE Design & Test 40 (2), 109-117, 2022 | 10 | 2022 |
| A dynamic hardware redundancy mechanism for the in-field fault detection in cores of GPGPUs JER Condia, P Narducci, MS Reorda, L Sterpone 2020 23rd International Symposium on Design and Diagnostics of Electronic …, 2020 | 10 | 2020 |
| A Compaction Method for STLs for GPU in-field test JD Guerrero-Balaguera, JER Condia, MS Reorda 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 454-459, 2022 | 9 | 2022 |
| A dynamic reconfiguration mechanism to increase the reliability of GPGPUs JER Condia, P Narducci, MS Reorda, L Sterpone 2020 IEEE 38th VLSI Test Symposium (VTS), 1-6, 2020 | 9 | 2020 |
| Exploring Hardware Fault Impacts on Different Real Number Representations of the Structural Resilience of TCUs in GPUs R Limas Sierra, JD Guerrero-Balaguera, JER Condia, M Sonza Reorda Electronics 13 (3), 578, 2024 | 8 | 2024 |
| DYRE: a DYnamic REconfigurable solution to increase GPGPU’s reliability JER Condia, P Narducci, M Sonza Reorda, L Sterpone The Journal of Supercomputing 77 (10), 11625-11642, 2021 | 8 | 2021 |
| Design and Verification of an open-source SFU model for GPGPUs JER Condia, JD Guerrero-Balaguera, CF Moreno-Manrique, MS Reorda 2020 17th Biennial Baltic Electronics Conference (BEC), 1-6, 2020 | 8 | 2020 |
Matteo SONZA REORDAPolitecnico di Torino, Dept. of Control and Computer EngineeringVerified email at polito.it
