| Implementation of energy efficient single flux quantum digital circuits with sub-aJ/bit operation MH Volkmann, A Sahu, CJ Fourie, OA Mukhanov Superconductor Science and Technology 26 (1), 015002, 2012 | 189 | 2012 |
| Three-dimensional multi-terminal superconductive integrated circuit inductance extraction CJ Fourie, O Wetzstein, T Ortlepp, J Kunert Superconductor Science and Technology 24 (12), 125015, 2011 | 136 | 2011 |
| JoSIM—superconductor SPICE simulator JA Delport, K Jackman, P Le Roux, CJ Fourie IEEE Transactions on Applied Superconductivity 29 (5), 1-5, 2019 | 109 | 2019 |
| An integrated row-based cell placement and interconnect synthesis tool for large SFQ logic circuits SN Shahsavani, TR Lin, A Shafaei, CJ Fourie, M Pedram IEEE Transactions on Applied Superconductivity 27 (4), 1-8, 2017 | 85 | 2017 |
| ColdFlux superconducting EDA and TCAD tools project: Overview and progress CJ Fourie, K Jackman, MM Botha, S Razmkhah, P Febvre, CL Ayala, Q Xu, ... IEEE Transactions on Applied Superconductivity 29 (5), 1-7, 2019 | 69 | 2019 |
| Full-gate verification of superconducting integrated circuit layouts with InductEx CJ Fourie IEEE Transactions on Applied Superconductivity 25 (1), 1-9, 2014 | 64 | 2014 |
| 1-pT noise fluxgate magnetometer for geomagnetic measurements and unshielded magnetocardiography M Janosek, M Butta, M Dressler, E Saunderson, D Novotny, C Fourie IEEE Transactions on Instrumentation and Measurement 69 (5), 2552-2560, 2019 | 61 | 2019 |
| Digital superconducting electronics design tools—Status and roadmap CJ Fourie IEEE Transactions on Applied Superconductivity 28 (5), 1-12, 2018 | 58 | 2018 |
| Status of superconductor electronic circuit design software CJ Fourie, MH Volkmann IEEE Transactions on Applied Superconductivity 23 (3), 1300205-1300205, 2012 | 51 | 2012 |
| Tetrahedral modeling method for inductance extraction of complex 3-D superconducting structures K Jackman, CJ Fourie IEEE Transactions on Applied Superconductivity 26 (3), 1-5, 2016 | 40 | 2016 |
| Extraction of DC-biased SFQ circuit verilog models CJ Fourie IEEE Transactions on Applied Superconductivity 28 (6), 1-11, 2018 | 37 | 2018 |
| Experimental investigation of energy-efficient digital circuits based on eSFQ logic MH Volkmann, A Sahu, CJ Fourie, OA Mukhanov IEEE transactions on applied superconductivity 23 (3), 1301505-1301505, 2013 | 36 | 2013 |
| Comparison of genetic algorithms to other optimization techniques for raising circuit yield in superconducting digital circuits CJ Fourie, WJ Perold IEEE transactions on applied superconductivity 13 (2), 511-514, 2003 | 36 | 2003 |
| Simulated inductance variations in RSFQ circuit structures CJ Fourie, WJ Perold IEEE transactions on applied superconductivity 15 (2), 300-303, 2005 | 35 | 2005 |
| High-accuracy InductEx calibration sets for MIT-LL SFQ4ee and SFQ5ee processes CJ Fourie, C Shawawreh, IV Vernik, TV Filippov IEEE Transactions on Applied Superconductivity 27 (2), 1-5, 2017 | 29 | 2017 |
| Experimentally verified inductance extraction and parameter study for superconductive integrated circuit wires crossing ground plane holes CJ Fourie, O Wetzstein, J Kunert, H Toepfer, HG Meyer Superconductor Science and Technology 26 (1), 015016, 2012 | 29 | 2012 |
| Layout-versus-schematic verification for superconductive integrated circuits RMC Roberts, CJ Fourie IEEE Transactions on Applied Superconductivity 25 (3), 1-5, 2014 | 27 | 2014 |
| Design and test of asynchronous eSFQ circuits IV Vernik, SB Kaplan, MH Volkmann, AV Dotsenko, CJ Fourie, ... Superconductor Science and Technology 27 (4), 044030, 2014 | 27 | 2014 |
| Flux trapping analysis in superconducting circuits K Jackman, CJ Fourie IEEE Transactions on Applied Superconductivity 27 (4), 1-5, 2016 | 26 | 2016 |
| A static timing analysis tool for RSFQ and ERSFQ superconducting digital circuit applications JA Delport, CJ Fourie IEEE Transactions on Applied Superconductivity 28 (5), 1-5, 2018 | 25 | 2018 |
Kyle JackmanStellenbosch UniversityVerified email at sun.ac.za
