| Networks on Chips: A new SOC paradigm L Benini, G De Micheli IEEE Computer 35 (1), 70-78, 2002 | 5101 | 2002 |
| Synthesis and optimization of digital circuits GD Micheli McGraw-Hill Higher Education, 1994 | 3586 | 1994 |
| A survey of design techniques for system-level dynamic power management L Benini, A Bogliolo, G De Micheli IEEE transactions on very large scale integration (VLSI) systems 8 (3), 299-316, 2000 | 1845 | 2000 |
| Bandwidth-constrained mapping of cores onto NoC architectures S Murali, G De Micheli Proceedings design, automation and test in Europe conference and exhibition …, 2004 | 911 | 2004 |
| Hardware-software cosynthesis for digital systems RK Gupta, G De Micheli IEEE Design & test of computers 10 (3), 29-41, 1993 | 833 | 1993 |
| NoC synthesis flow for customized domain specific multiprocessor systems-on-chip D Bertozzi, A Jalabert, S Murali, R Tamhankar, S Stergiou, L Benini, ... IEEE transactions on parallel and distributed systems 16 (2), 113-129, 2005 | 738 | 2005 |
| System-level power optimization: techniques and tools L Benini, G Micheli ACM Transactions on Design Automation of Electronic Systems (TODAES) 5 (2 …, 2000 | 661 | 2000 |
| Analysis of power consumption on switch fabrics in network routers TT Ye, GD Micheli, L Benini Proceedings of the 39th annual design automation conference, 524-529, 2002 | 609 | 2002 |
| Hardware/software co-design G De Michell, RK Gupta Proceedings of the IEEE 85 (3), 349-365, 1997 | 607 | 1997 |
| Policy optimization for dynamic power management L Benini, A Bogliolo, GA Paleologo, G De Micheli IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1999 | 571 | 1999 |
| Networks on chips G De Micheli Design, Automation, and Test in Europe, 105-110, 2008 | 528 | 2008 |
| Networks on chip: A new paradigm for systems on chip design L Benini, G De Micheli Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002 | 484 | 2002 |
| Optimal state assignment for finite state machines G De Micheli, RK Brayton, A Sangiovanni-Vincentelli IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1985 | 445 | 1985 |
| Analysis of error recovery schemes for networks on chips S Murali, T Theocharides, N Vijaykrishnan, MJ Irwin, L Benini, ... IEEE Design & Test of Computers 22 (5), 434-442, 2005 | 426 | 2005 |
| SUNMAP: a tool for automatic topology selection and generation for NoCs S Murali, G De Micheli Proceedings of the 41st annual Design Automation Conference, 914-919, 2004 | 420 | 2004 |
| Asymptotic zero-transition activity encoding for address busses in low-power microprocessor-based systems L Benini, G De Micheli, E Macii, D Sciuto, C Silvano Proceedings Great Lakes Symposium on VLSI, 77-82, 1997 | 409 | 1997 |
| /spl times/pipesCompiler: a tool for instantiating application specific networks on chip A Jalabert, S Murali, L Benini, G De Micheli Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 375 | 2004 |
| Dynamic power management for non-stationary service requests EY Chung, L Benini, A Bogiolo, G De Micheli Proceedings of the conference on Design, automation and test in Europe, 18-es, 1999 | 367 | 1999 |
| Networks on chips L Benini, G De Micheli, D Bertozzi, I Cidon, K Goossens, K Kim, K Lee, ... Elsevier, 2006 | 349 | 2006 |
| Dynamic voltage scaling and power management for portable systems T Simunic, L Benini, A Acquaviva, P Glynn, G De Micheli Proceedings of the 38th annual Design Automation Conference, 524-529, 2001 | 336 | 2001 |
