A high-performance core micro-architecture based on RISC-V ISA for low power applications S Bora, R Paily IEEE Transactions on Circuits and Systems II: Express Briefs 68 (6), 2132-2136, 2020 | 24 | 2020 |
Design And Implementation of Blind Assistance System Using Real Time Stereo Vision Algorithm VC Sekhar, S Bora, D Monalisa Proc. IEEE 29th International Conference on VLSI Design and 2016 15th …, 2016 | 24* | 2016 |
An efficient architecture for QRS detection in FPGA using integer Haar wavelet transform S Talukder, R Singh, S Bora, R Paily Circuits, Systems, and Signal Processing 39 (7), 3610-3625, 2020 | 20 | 2020 |
Design and Implementation of Adaptive Binary Divider for Fixed-Point and Floating-Point Numbers S Bora, R Paily Circuits, Systems, and Signal Processing 41 (2), 1131-1145, 2022 | 6 | 2022 |
Impact of Pipelining on Low Power IoT applicable RISC-V ISA Core Micro-architectures TM Ignatius, S Bora, RP Palathinkal 2024 IEEE 17th International Symposium on Embedded Multicore/Many-core …, 2024 | | 2024 |
Design and implementation of core micro architecture based on risc v isa S Bora Guwahati, 2022 | | 2022 |
Design of an All Optical 3-Bit Modulo Eight Asynchronous Up Counter CK Borgohain, C Kumar, S Bora American Journal of Electromagnetics and Applications 3 (2), 12-15, 2015 | | 2015 |
Design and Implementation of 2-Input OR Gate based on XGM properties of Semiconductor Optical Amplifier CK Borgohain, C Kumar, S Bora International Journal of Advances in Telecommunications, Electrotechnics …, 2014 | | 2014 |