| Bridge resistance random access memory device with a singular contact structure CH Ho, EK Lai, KY Hsieh US Patent 7,608,848, 2009 | 373 | 2009 |
| 3D two bit-per-cell NAND flash memory HL Lung, HT Lue, YH Shih, EK Lai, MH Lee, TY Wang US Patent 8,437,192, 2013 | 337 | 2013 |
| 3D memory array arranged for FN tunneling program and erase HL Lung, YH Shih, EK Lai, MH Lee, HT Lue US Patent 8,203,187, 2012 | 293 | 2012 |
| Methods of operating non-volatile memory cells having an oxide/nitride multilayer insulating structure EK Lai, YH Shih, TH Hsu, SC Lee, JY Hsieh, KY Hsieh US Patent 7,450,423, 2008 | 257 | 2008 |
| Multi-level cell resistance random access memory with metal oxides EK Lai, CH Ho, KY Hsieh US Patent 7,697,316, 2010 | 256 | 2010 |
| Programmable resistive RAM and manufacturing method CH Ho, EK Lai, KY Hsieh US Patent 7,560,337, 2009 | 253 | 2009 |
| Resistive random access memory and method for manufacturing the same MD Lee, CH Ho, EK Lai, KY Hsieh US Patent 8,114,715, 2012 | 235 | 2012 |
| Methods of operating a bistable resistance random access memory with multiple memory layers and multilevel memory states CH Ho, EK Lai, KY Hsieh US Patent 7,586,778, 2009 | 233 | 2009 |
| Cell operation methods using gate-injection for floating gate NAND flash memory HT Lue, TH Hsu, EK Lai US Patent 8,325,530, 2012 | 230 | 2012 |
| Manufacturing method for phase change RAM with electrode layer process EK Lai, CH Ho, YC Chen, KY Hsieh US Patent 7,605,079, 2009 | 210 | 2009 |
| Memory cell device and manufacturing method EK Lai, CH Ho, KY Hsieh US Patent 7,599,217, 2009 | 198 | 2009 |
| Method for forming self-aligned thermal isolation cell for a variable resistance memory array EK Lai, CH Ho, KY Hsieh US Patent 7,531,825, 2009 | 194 | 2009 |
| BE-SONOS: A bandgap engineered SONOS with excellent performance and reliability HT Lue, SY Wang, EK Lai, YH Shih, SC Lai, LW Yang, KC Chen, J Ku, ... IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest …, 2005 | 183 | 2005 |
| Phase change materials and their application to random access memory technology S Raoux, RM Shelby, J Jordan-Sweet, B Munoz, M Salinga, YC Chen, ... Microelectronic Engineering 85 (12), 2330-2333, 2008 | 182 | 2008 |
| Programmable resistive RAM and manufacturing method C Ho, EK Lai, KY Hsieh US Patent 7,595,218, 2009 | 179 | 2009 |
| Memory cell access device having a pn-junction with polycrystalline and single crystal semiconductor regions HL Lung, EK Lai, YH Shih, YC Chen, SH Chen US Patent 8,907,316, 2014 | 164 | 2014 |
| Structures and methods of a bistable resistive random access memory CH Ho, EK Lai, KY Hsieh US Patent 8,129,706, 2012 | 161 | 2012 |
| Integrated circuit memory with single crystal silicon on silicide driver and manufacturing method HL Lung, EK Lai US Patent 8,089,137, 2012 | 159 | 2012 |
| 3D memory array arranged for FN tunneling program and erase HL Lung, YH Shih, EK Lai, MH Lee, HT Lue US Patent 8,426,294, 2013 | 132 | 2013 |
| Non-volatile memory semiconductor device having an oxide-nitride-oxide (ONO) top dielectric layer HT Lue, EK Lai US Patent 7,576,386, 2009 | 127 | 2009 |
Wei-Chih ChienMacronixVerified email at mxic.com.tw
